1/4 rev. a structure silicon monolithic integrated circuit type step down dc/dc converter controller ic for note pc product series BD95371MUV features ?built in h 3 reg dc/dc controller ? switching frequency variable (f=200khz 500khz) absolute maximum ratings ta = 2 5 parameter symbol limit unit input voltage 1 vcc 7 1 2 v input voltage 2 vdd 7 1 2 v input voltage 3 vin 28 1 2 v boot voltage boot 35 1 2 v boot-sw voltage boot-sw 7 1 2 v hg-sw voltage hg-sw 7 1 2 v lg voltage lg vdd v output voltage vout/is+/is- vcc v en input voltage en 7 1 v power dissipation 1 pd1 0.34 3 w power dissipation 2 pd2 0.70 4 w power dissipation 3 pd3 2.20 5 w power dissipation 4 pd4 3.56 6 w operating temperature range topr -10 +100 storage temperature range tstg -55 +150 maximum junction temp erature tjmax +150 *1 not to exceed pd. *2 instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle. *3 reduced by 2.7mw/ for each increase in ta of 1 over 25 . (when don?t mounted on a heat radiation board ) *4 reduced by 5.6mw/ for increase in ta of 1 over 25 . (when mounted on a board 70.0mm 70.0mm 1.6mm 1-layer glass-epoxy pcb, copper foil area: 10.29mm 2 ) *5 reduced by 17.6mw/ for increase in ta of 1 over 25 . (when mounted on a board 70.0mm 70.0mm 1.6mm 4-layer glass-epoxy pcb, copper foil area: 10.29mm 2 2,3-layer copper foil area: 5505mm 2 ) *6 reduced by 28.5mw/ for increase in ta of 1 over 25 . (when mounted on a board 70.0mm 70.0mm 1.6mm 4-layer glass-epoxy pcb, copper foil area: 5505mm 2 ) operating conditions ta = 2 5 parameter symbol min max unit input voltage 1 vcc 4.5 5.5 v input voltage 2 vdd 4.5 5.5 v input voltage 3 vin 4.5 25 v boot voltage boot 4.5 30 v sw voltage sw -0.7 25 v boot-sw voltage boot-sw 4.5 5.5 v en input voltage en 0 5.5 v is input voltage is+/is- 0.7 2.7 v min on time tonmin - 80 ns this product is not designed for protection against radioactive rays.
2/4 rev. a electrical characteristics unless otherwise noted, ta=25 vcc=5v,vdd=5v,en=3v,vin=12v,vout=1.05v,r fs =36k ? parameter symbol standard value unit condition min typ max [ whole device ] vcc bias current icc - 1500 1800 a vcc standb y current iccstb -010 a en 0 vin bias current iin -3080 a vin standb y current iinstb -010 a en 0 en low volta g e v en _low gnd - 0.8 v en highvoltage (forced continuous mode) v enth _con 2.3 - 3.8 v en hi g hvolta g e ( sllm mode ) v enth _sllm 4.5 - 5.5 v en bias current ien -1525 a en=3v [ under volta g e locked out ] vcc threshold volta g e vcc _ uvlo 3.7 4.0 4.3 v vcc:swee p u p vcc h y steresis volta g ed v c c _ uvlo 100 160 220 mv vcc:swee p down [ h 3 reg control ] on time ton 194 219 244 ns max on time tonmax - 3.5 - s min off time toffmin - 490 700 ns [ fet driver ] hg hi g her side on resisto r hghon - 3.0 6.0 hg lower side on resisto r hglon - 2.0 4.0 lg hi g her side on resisto r lghon - 3.0 6.0 lg lower side on resisto r lglon - 0.5 1.0 [ scp ] scp strat-u p volta g e vsc p 0.345 0.420 0.495 v scp delay time tscp - 2.5 - ms [ ovp ] fb threshold volta g e vov p 0.825 0.900 0.975 v [ soft start ] char g e current iss 1 2 3 a standb y volta g e vss _ stb - - 50 mv [ current limit block ] setting current iilim - 10 - a current limit threshold ilim 75 100 125 mv rilim=100k [ out p ut volta g e settin g ] vout t yp ical volta g e ref 0.743 0.750 0.757 v is+ in p ut current iis+ -1 0 1 a is+=1.05v is- in p ut current iis- -1 0 1 a is-=1.05v [ power good ] fb power good v pgood 0.38 0.47 0.56 v dischar g e on resisto r ron pg ood - 50 150 [ boot diode ] vf volta g e vf 0.4 0.5 0.6 v if=1ma
3/4 rev. a physical dimensions pin number pin name block diagram pin number pin name 1 ss 2 en/sllm 3 ilim 4 vcc 5 fb 6 vout 7 freq 8 fs 9 is- 10 is+ 11 pgnd 12 lg 13 vdd 14 sw 15 hg 16 boot 17 vin 18 out 19 pgood 20 gnd reverse fin 2.10.1 c0.2 0.5 1.0 15 6 10 11 15 16 20 4.0 0.1 4.0 0.1 2.10.1 0.40.1 0.25 +0.05 -0.04 0.02 +0.03 -0.02 1.0max. (0.22) 0.08 s s lot.no 1pin mark vqfn020v4040 (unit:mm) please connect fin to gnd. 95371 reference block thermal protection h 3 reg tm controller block sllm r s q driver circuit pgnd lg vdd sw hg boot ss v cc en/sllm fb tsd sllm ss soft start block uvlo 2.5ms delay ref 0.56 ss 0.56 bg scp 4 1 2 5 16 15 14 13 12 11 vin vout - + + fb ref 0.56 19 pgood ref vin 17 fb + - ovp - + ref 1.2 fb + - ovp sllm - + en vdd vout bg en/uvlo vin 8 fs - + out 18 ss ref 9 ls- - + uvlo ilim scp tsd vdd 3 ilim 7 freq ls+ 10 is+ vout current limit 6 is+ ilim + gnd 20
4/4 rev. a operation notes 1. absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2. connecting the power supply connector backward connecting of the power supply in reverse polarity ca n damage ic. take precautions when connecting the power supply lines. an external direction diode can be added. 3. power supply lines design pcb layout pattern to provide low impedance gnd and supply lines. to obtain a low noise ground and supply line, separate the ground section and su pply lines of the di gital and analog bl ocks. furthermore, for all power supply terminals to ics, connect a capacitor between the power s upply and the gnd terminal. when applying electrolytic capacitors in the circuit, not that capacitance char acteristic values are reduced at low temperatures. 4. gnd voltage the potential of gnd pin must be minimu m potential in all operating conditions. 5. thermal design use a thermal design that allows for a sufficient margin in light of the power dissipat ion (pd) in actual operating conditions. 6. inter-pin shorts and mounting errors use caution when positioning the ic for mounting on printed circuit boards. the ic may be damaged if there is any connection error or if pins are shorted together. 7. actions in strong electromagnetic field use caution when using the ic in the presence of a strong electromagnetic field as doing so may cause the ic to malfunction. 8. aso when using the ic, set the output transistor so that it does not exceed absolute maximum ratings or aso. 9. thermal shutdown circuit the ic incorporates a built-in thermal shutdown circuit (tsd circuit). the thermal shutdown circuit (tsd circuit) is designed only to shut the ic off to pr event thermal runaway. it is not designe d to protect the ic or guarantee its operation. do not continue to use the ic after operating this circuit or use t he ic in an environment where the operation of this circuit is assumed. 10. ground wiring pattern when using both small signal and large current gnd patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the gr ound potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external components, either. 11. heat sink (fin) since the heat sink (fin) is connected with the sub, short it to the gnd. tsd on temperature [c] (typ.) hysteresis temperature [c](typ.) BD95371MUV 175 15
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